Sourcebook of parallel computing by Dongarra J., et al.

By Dongarra J., et al.

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A) The separate stages in the pipeline. (b) Four pairs of numbers are added in 7 clock cycles. Note that after a 3-cycle delay, one result is returned every cycle. Without pipelining, 16 clock cycles would be required to add four pairs of numbers. for many CPUs, becomes a major problem. Approaches such as pipelining (already a kind of parallelism) require that enough operations and operands be available to keep the pipeline full. Other approaches begin to introduce a very fine scale of parallelism.

5 ns clock. 8 ns clocks are becoming available. This is a factor of 16 in 20 years, or equivalently a doubling every 5 years. Remarkable advances have occurred in other areas of computer technology as well. The cost per byte of storage, both in computer memory and in disk storage, has fallen along a similar exponential curve, as has the physical size per byte of storage (in fact, cost and size are closely related). 1 01/85 01/90 01/95 01/00 01/05 Improvement in CPU performance measured by clock rate in nanoseconds.

In recent years, there has been rapid progress in memory system design, particularly for personal computers and workstations. Many of these designs have focused on delivering greater bandwidth and have names like RAMBUS, DDR (for double data rate), and EDO. See Cuppu et al. [240] and other articles in the same issue for a discussion of high-performance DRAM technologies. 3 I/O and Networking Discussions of computers often slight the issues of I/O and networking. I/O, particularly to the disks that store files and swap space for supporting virtual memory, has followed a path similar to that of main memory.

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